The configuration register of the watchdog timer serves for swithing on and off of the watchdog timer and for the adjustment (preseting) of its operation. The preset value is a number dividing the internal RC clock to obtain, in this case, the clock of the watchdog timer. The watchdog timer is independent of the internal clock which governs the execution of instructions. In this way an operative timer is obtained even if the internal clock fails. The frequency of the RC oscillator for the watchdog timer is 512kHz. After the initial division by 4 one obtains the 128kHz which is the basic clock of the watchdog timer.
The basic clock 128kHz of the watchdog timer is divided by two progammable values. The first is prescaler A and the second prescaler B. After division, the internal clock of the watchdog timer is obtained. With this clock an 8-bit register is incremented. When the value in the register reaches the maximum of 255, the watchdog timer resets the microcontroller or switches the microcontroller from inactive to active state. If the microcontroller is in the inactive (SLEEP) state, the watchdog swithes it into the active state and the execution of the current program continues. If the microcontroller is in the active mode, i.e. the execution of the current program is on, the watchdog timer will, upon the expiration of the defined time, reset the micricontroller. The time interval when the wacthdog sends the reset/wake-up signal is calculated as follows. The period of the basic clock is 1/(128 kHz) = 7.8125µs. This value is multiplied by the prescaler A and prescaler B values. This gives the clock period of the watchdog timer. This period multiplied by 255 gives the maximum value the register will be incremented. This value is the time the watchdog timer will wait before it generates the reset/wake-up signal of the microcontroller. The waiting times, in milliseconds, depending on the values of prescaler A and prescaler B, are given in table 2-2.PRESCALER B VALUE | PRESCALER A VALUE | |||
---|---|---|---|---|
1 | 8 | 64 | 512 | |
1 | 2 | 16 | 128 | 1024 |
2 | 4 | 32 | 256 | 2048 |
3 | 6 | 48 | 384 | 3072 |
4 | 8 | 64 | 412 | 4096 |
5 | 10 | 80 | 640 | 5120 |
6 | 12 | 96 | 768 | 6144 |
7 | 14 | 112 | 896 | 7168 |
8 | 16 | 128 | 1024 | 8192 |
9 | 18 | 144 | 1152 | 9216 |
10 | 20 | 160 | 1280 | 10240 |
11 | 22 | 176 | 1408 | 11264 |
12 | 24 | 192 | 1536 | 12288 |
13 | 26 | 208 | 1664 | 13312 |
14 | 28 | 224 | 1792 | 14336 |
15 | 30 | 240 | 1920 | 15360 |
16 | 32 | 256 | 2048 | 16384 |
NAME | ADR | 23-16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5-4 | 3-0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
FWDT | 0xF0002 | - | FWDTEN | - | - | - | - | - | - | - | - | - | FWPSA<1:0> | FPR<3:0> |
Table 2-3 The configuration register od the watchdog timer FWDT
FWDTEN – Watchdog enable configuration bit 1 – Watchdog enabled; LPRC osillator can not be disabled 0 – Watchdog disabled FWPSA <1:0> - Selected value of prescaler A 11 = 1:512 10 = 1:64 01 = 1:8 00 = 1:1 FWPSB <1:0> - Selected value of prescaler B 1111 = 1:16 1110 = 1:15 .... .... .... 0001 = 1:2 0000 = 1:1