9.0 Introduction


The Serial Peripheral Interface (SPI) module is a synchronous serial interface useful for communicating with other peripheral or microcontoller devices. The examples of the peripheral devices are: serial EEPROMs, shift registers, display drivers, serial A/D converters, etc. The SPI module is compatible with Motorola’s SPI and SIOP interfaces.

Depending on the variant, the dsPIC30F family offers one or two SPI modules on a single device. E.g. dsPIC30F3014 has one SPI interface module, whereas dsPIC30F6014A has two.

A standard SPI serial port consists of the following special function registers (SPR):

  • SPIxBUF – SFR used to buffer data to be tramsittesd and data that have been received. It consists of two memory locations SPIxTXB (data trasmit) and SPIxRXB (data receive).
  • SPIxCON – a control register that configures the module for various modes of operation.
  • SPIxSTAT – a status register that indicates various status conditions.

In addition, there is a 16-bit register, SPIxSR, that is not memory mapped. It is used for shifting in and out of the SPI port.

The memory mapped special function register SPIxBUF, the SPI data receive/transmit register, actually consists of two separate registers – SPIxTXB and SPIxRXB. If a user writes data to the SPIxBUF address, internally the data are written to the SPIxTXB (transmit buffer) register. Similarly, when the user reads the received data from the SPIxBUF, internally the data are read from the SPIxRXB (receive buffer) register. This double buffering of transmit and receive operations allows continuous data transfers in the background.

The user can not write to the SPIxTXB register or read from the SPIxRXB register directly. All reads and writes are performed on the SPIxBUF register.

Fig. 9-1 shows functional block diagram of the SPI module. In addition to the above registers, the SPI module serial interface consists of the following four pins:

  • SDx – serial data input,
  • SDOx – serial data output,
  • SCKx – shift clock input or output,
  • SSx – active low slave select or frame synchronization I/O pulse.
NOTE: The SPI module can be configured to operate using 3 or 4 pins. In the 3-pin mode, the SSx pin is not used.


Fig. 9-1 Functional block diagram of SPI module

The SPI module has the following flexible operating modes:

  • 8-bit and 16-bit data transmission/reception,
  • Master and slave modes,
  • Framed SPI modes.