The program memory protection configuration register is used to code protect or write protect the program memory space. It includes all user program memory with the exception of the interrupt vector table space.
If the program memory is code protected, the device program memory can not be read from the device using in-circuit serial programming or the device programr. Further code cannot be programd into the device without first erasing the entire general code segment. The program memory protection register uses only two configuration bits, the others are unimplemented. The two configuration bits must be programd as a group, i.e. it is not possible to change only one of them. If the code protect and write protect of the program memory are enabled, a full chip erase must be performed to change the state of either bit. The structure of the program memory protection configuration register is shown in table 2-5.NAME | ADR | 23-16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
FGS | 0x8000A | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - |
Table 2-5. Program memory protection configuration register FGS
GCP - Program memory code protect enable 1 - Program memory is not code protected 0 - Program memory is code protected GWRP - Program memory write protect enable 1 – Program memory is not write protected 0 - Program memory is write protected